64GFC FAQ

At our last live FCIA webcast “Will You Still Love Me When I Turn 64GFC” our expert speakers, Dean Wallace and Barry Maskas, provided a technical session on T11 standards which define 64GFC serial Fibre Channel. It was a deep dive into backwards speed auto-negotiation compatibility, compatible form factors, and more, while having some fun making comparisons to a famous Beatles song! If you missed it, it’s available on-demand.

We had several questions during the webcast, as promised, we’re sharing answers to them here:

Q. Why is latency reduction just 20% with doubling the speed? Shouldn’t it be 50% reduction approximately?

A. The goal from the FCIA is a 20% reduction in latency. The number achieved could be greater than that. The FC0 and FC1 are only a very small fraction of the overall latency so improvement through the SERDES, PCS and FEC is only a small part of the overall latency depending on what you are defining as latency.

Q. Why use training if optical links cannot use it? It looks like an extra complication, just invented for electrical backplanes that are hardly seen in real world?

A. You are correct that transmit training is not used for optics. The transmit training frames are sent during speed negotiation at the higher speeds to communicate certain information to the link partner since as the device is 64GFC capable, the type of FEC to be used and number of lanes. When link speed negotiation is complete for 64GFC then transmit training is entered to allow the switch from 28.05Gb to 28.9Gb and from PAM2 to PAM4. This gives devices a chance to change baud rate and adapt to the new signal. It is communicated through the control field that actual transmit training won’t be run because fixed coefficients are being used.

Q. Can you make commercial examples of products that are using 32GFC over electrical backplane? Is that pure theory or are there practical implementations?

A. Yes 32GFC capable Fibre Channel backplanes do exist.

Q. Are the bits passing in parallel across all 4 lanes?

A. For the four lane variants defined in FC-PI-6P (4x32Gbps) and FC-PI-7P (4x64Gbps) which is still in development the data is stripped over four lanes. The 64GFC variant is a single lane two bits per symbol (PAM4).

Q. Why is the baud rate slightly higher than a 32GFC? Since we moved from PAM2 to PAM4, it seems logical the same baud rate should be used.

A. The baud rate increased from 32GFC to 64GFC because a different FEC was used. In 32GFC a RS(528,514) was used and the extra parity bits needed came from transcoding the 64/66 data using a 256/257 transcoder. For 64GFC a RS(544,514) FEC was used to achieve a higher level of error correction. There was no way from a digital standpoint to gain the extra parity bits. Because of this, the actual baud rate needed to change. The PAM2 (32GFC) to PAM4 (64GFC) transition would have kept the baud rate at 28.05Gb if the FEC didn’t change. The FEC change caused the baud rate to increase by 544/528*28.05= 28.9Gb. This gives the extra parity bits.

Q. 32GFC has a reach of 70m only. How can 64G go longer than that?

A. The 70 meter reach is for OM3 fiber. The reach for OM4 fiber is 100 meters.

Q. What about backward compatibility of 64G with 8GFC? In the end 32G is backward compatible with 64GFC right?

A. Yes I would expect backward compatibility down that far. Although that would be implementation dependent and you should check with your supplier.

2018-12-17T12:09:03+00:00 December 14th, 2018|

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